New research to identify potential flaws in electronic chips

electronic chips

It would analyse problems associated with design decisions at a microarchitectural level.

The computer scientist from the University of Kaiserslautern has invented a new algorithm to identify potential flaws in the electronic chips.

A new algorithm called unique program execution checking (UPEC) has been developed to find security bugs in computer chips before they hit the market. According to the team’s key member Wolfgang Kunz, UPEC lets electronic chip designers identify security flaws in the microarchitecture before they are manufactured on a large scale.

Worth noting-

1. UPEC was designed to Analyze security holes in high-end processors as well as those existing in IoT devices.
2. The algorithm considers almost every possible application that can be run on processors. This way it could reveal any flaw associated in new designs.
3. UPEC analyzes flaws that stem from microarchitectures which can be exploited to create covert channels.
4. In order to test the algorithm, the researchers made use of open-source chip designs and discovered a number of unique flaws.

‘Orc’ attack-

Kunz, who is the lead Professor – Chair of Electronic Design Automation at TU Kaiserslautern told Help Net Security that UPEC can effectively remediate what they call the ‘Orc’ attack. This attack is predominantly used to target IoT devices. “Theoretically, a hacker could use an Orc attack to assume control of an autonomous vehicle or to commandeer networked computers on the Internet-of-Things,” said another team member Subhashish Mitra, who is a Professor in the Department of Electrical Engineering and Computer Science at Stanford University.

Positive developments-

UPEC is claimed to be easy to use for chip designers. Moreover, the algorithm has seen positive results for processors of medium complexity. Overall, UPEC aims to prevent hardware security attacks in a much more proactive way.